Method for fabricating a semiconductor memory having charge...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S305000, C438S306000

Reexamination Certificate

active

07015095

ABSTRACT:
Electrically conductive material is introduced into interspaces between the word lines (2) and is partially removed using a mask (6) in such a way that residual portions (7) of the conductive material in each case fill a section of the relevant interspace and produce an electrical contact with source/drain regions (15). With further portions of the conductive material, it is possible to form alignment marks for the fabrication process.

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patent: 5679591 (1997-10-01), Lin et al.
patent: 5768192 (1998-06-01), Eitan
patent: 6011725 (2000-01-01), Eitan
patent: 6211012 (2001-04-01), Lee et al.
patent: 6555922 (2003-04-01), Nakagawa
patent: 6630746 (2003-10-01), Mancini et al.
patent: 2002/0149958 (2002-10-01), Kuniklyo
patent: 2003/0209767 (2003-11-01), Takahashi et al.
patent: 2005/0006710 (2005-01-01), Riedel
patent: WO 99/60631 (1999-11-01), None

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