Method for fabricating a semiconductor memory cell structure

Details Method for fabricating a semiconductor memory cell structure Method for fabricating a semiconductor memory cell structure

1996-05-16

1998-08-11

Nguyen, Tuan H.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438259, 438698, H01L 21336

Patent

active

057926948

ABSTRACT:
A semiconductor memory cell structure includes a semiconductor substrate, a plurality of field insulating layers on the semiconductor substrate along a first direction at a first interval, a plurality of floating gate electrodes on the semiconductor substrate between the field insulating layers, the floating gate electrodes being aligned with the field insulating layers, a plurality of control electrodes over the floating gate electrodes and the field insulating layer at a second interval along a second direction, and a plurality of impurity areas on the semiconductor substrate at both sides of the floating gate electrodes along the first direction between the field insulating layers.

REFERENCES:
patent: 4734887 (1988-03-01), Sugatani
patent: 4795719 (1989-01-01), Eitan
patent: 5120671 (1992-06-01), Tang et al.
patent: 5380676 (1995-01-01), Hsue et al.
patent: 5449632 (1995-09-01), Hong
patent: 5536669 (1996-07-01), Su et al.
patent: 5545580 (1996-08-01), Sheng et al.

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