Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-05-08
2007-05-08
Dang, Phuc T. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S197000, C257S004000
Reexamination Certificate
active
11074946
ABSTRACT:
Semiconductor memory cell and also a corresponding fabrication method are described, in which a first or bottom electrode device of the memory element of the semiconductor memory cell according to the invention and the gate electrode device of the underlying field effect transistor as selection transistor of the semiconductor memory cell are formed as the same material region or with a common material region.
REFERENCES:
patent: 2001/0045605 (2001-11-01), Miyashita et al.
patent: 2002/0168820 (2002-11-01), Kozicki et al.
patent: 2003/0234397 (2003-12-01), Schmid et al.
patent: 2003060090 (2003-02-01), None
Pinnow Cay-Uwe
Symanczyk Ralf
Dang Phuc T.
Edell Shapiro & Finnan LLC
Infineon - Technologies AG
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