Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-09-09
2008-09-09
Lindsay, Jr., Walter L. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S586000, C438S627000, C438S637000, C438S630000, C257SE21438, C257SE21507, C257SE21577
Reexamination Certificate
active
11798366
ABSTRACT:
A semiconductor device having a self-aligned contact hole is formed by providing a side wall oxide film on a gate electrode, covering the gate electrode and the side wall oxide film by an oxide film and further covering the oxide film by a nitride film, wherein the oxide film is formed by a plasma CVD process with a reduced plasma power such that the H2O content in the oxide film is less than about 2.4 wt %.
REFERENCES:
patent: 4292728 (1981-10-01), Endo
patent: 4612207 (1986-09-01), Jansen
patent: 5296400 (1994-03-01), Park et al.
patent: 5485420 (1996-01-01), Lage et al.
patent: 5610099 (1997-03-01), Stevens et al.
patent: 5626679 (1997-05-01), Shimizu et al.
patent: 6017614 (2000-01-01), Tsai et al.
patent: 6069400 (2000-05-01), Kimura et al.
patent: 57-128058 (1982-08-01), None
patent: 2-27716 (1990-01-01), None
patent: 2-87531 (1990-03-01), None
patent: 2-262358 (1990-10-01), None
patent: 2-303168 (1990-12-01), None
patent: 3-285330 (1991-12-01), None
patent: 4-69968 (1992-03-01), None
patent: 4-154124 (1992-05-01), None
patent: 4-357828 (1992-12-01), None
patent: 5-55475 (1993-03-01), None
patent: 5-160067 (1993-06-01), None
patent: 5-347274 (1993-12-01), None
patent: 6-151736 (1994-05-01), None
patent: 6-204420 (1994-07-01), None
patent: 7-38104 (1995-02-01), None
patent: 7-115198 (1995-05-01), None
patent: 7-135208 (1995-05-01), None
patent: 7-153950 (1995-06-01), None
patent: 7-183253 (1995-07-01), None
patent: 7-321102 (1995-12-01), None
patent: 8-222633 (1996-08-01), None
patent: 8-255903 (1996-10-01), None
patent: 8-274187 (1996-10-01), None
Wolf. S; Silicon Processing for the VLSI Era, vol. 2; Lattice Press, Sunset Beach, CA, 1990; pp. 194-198.
Karakawa Katsuyuki
Suzuki Kousuke
Fujitsu Limited
Lindsay Jr. Walter L.
Pompey Ron E
Westerman, Hattori, Daniels & Adrian , LLP.
LandOfFree
Method for fabricating a semiconductor device having an... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for fabricating a semiconductor device having an..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating a semiconductor device having an... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3905801