Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-10-26
2000-08-22
Trinh, Michael
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438301, 438307, 438673, 438531, H01L 21336
Patent
active
06107148&
ABSTRACT:
A method for fabricating a semiconductor device having LDD structure. The method includes: a first step for forming an electrically insulating layer on an active area defined on a surface of a semiconductor substrate; a second step for forming a conductive layer on said insulating layer; a third step for forming a patterned photoresist layer of a downward tapered shape on said conductive layer; a fourth step for forming a gate electrode by patterning said conductive layer using a mask provided by bottom portions of said patterned photoresist layer; a fifth step for forming heavilyly doped regions at both sides of said gate electrode by introducing ions using a mask provided by top portions of said patterned photoresist layer; a sixth step for removing said patterned photoresist layer; and a seventh step for forming lightly doped regions at both sides of said gate electrode by introducing ions using a mask provided by said gate electrode.
REFERENCES:
patent: 4509991 (1985-04-01), Taur
patent: 5877530 (1999-03-01), Aronowitz et al.
patent: 5937299 (1999-08-01), Michael et al.
Naoe Ishizaka, Manufacture of Field Effect Transistor, 2-45935 (A), Fujitsu Ltd., 1990, Appl. No. 63-196791.
Takashi Omori, Manufacture of Semiconductor Device, 2-73638 (A), Kawasaki Steel Corporation, 1990, App. No. 63-224798.
Nobuyoshi Sakakibara, Manufacture of MOS Semiconductor Element, 3-69166 (A), Nippon Soken Inc., 1991, App. No. 64-205096.
Nippon Steel Semiconductor Corporation
Trinh Michael
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