Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1999-04-09
2001-08-07
Nguyen, Tuan H. (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S003000, C438S396000
Reexamination Certificate
active
06271076
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to the fabrication of metallized dielectric structures and more specifically to the fabrication of novel capacitor structures having optimal interface properties coupled with enhanced conductor-to-dielectric adhesion.
BACKGROUND OF THE INVENTION
In the fabrication of integrated circuits, layers of metal or of other conducting materials are deposited onto materials having extremely high dielectric constants to form integrated circuit components. In particular, capacitor structures require a discrete interface between high dielectric materials and the electrode materials in order to exhibit the optimal capacitance. While the discrete interface provides the desirable electrical characteristics, many of the preferred capacitor materials do not adhere well to each other at the interface, causing concern that delamination and failure will occur at the high temperatures encountered during processing and use. In addition, the conducting material should be one which does not react with the dielectric, since such reaction can form an interfacial layer having a lower dielectric constant than the original material. The presence of such an interfacial layer introduces, in effect, another capacitor in series with the intended capacitor, severely degrading the total dielectric constant by reduction of the total capacitance.
Typical integrated circuit capacitors include a lower electrode of one metal or other conducting material deposited on a dielectric substrate, a sandwich layer of the high dielectric material, and an upper electrode of the same or a different conducting material. Conducting materials which are typically used for capacitor electrodes include aluminum, titanium and chromium, preferred for their high conductivity, excellent adhesion properties, and ease of use for connectivity to other levels of circuitry. While such materials have many desirable characteristics, they readily react with dielectrics, forming the harmful interfacial oxide layers. Relatively inert metals, such as platinum and gold, are good electrode conductors which form acceptable interfaces; but, they do not exhibit good adhesion, and are costly to use.
Many varied solutions have been proposed to improve the conductor-to-dielectric interfaces and to overcome the aforementioned problems. Most solutions have concentrated on the interface between the first, lower electrode of a capacitor and the dielectric substrate on which the integrated circuit is formed, wherein adhesion is a singular problem without the attendant concern of maintenance of the electrically discrete interface, since the dielectric constant of the substrate need not be very high. For the interface between the high dielectric constant sandwich layer, preferably a high permittivity insulating thin film, and the electrodes, however, both interface properties and adhesion are concerns.
Proposed solutions include: electrodes comprising conducting layers overlaying seed layers of relatively inert metals; bilayer electrodes consisting of first-deposited adhesion layers with overlaying metal layers; and, metal-oxide interlayers between the high dielectric constant materials and the conductors. All of the approaches which have been proposed, however, suffer from problems of compromised interface integrity, either from the physical or the electrical perspective.
It is therefore an objective of the present invention to provide a novel conductor-dielectric integrated circuit structure, and method for fabrication thereof, which provides long-term interface integrity between the high dielectric material and the conducting material.
Another objective of the invention is to provide a novel conductor-dielectric integrated circuit structure and fabrication method which utilizes minimal amounts of high cost materials.
Still another objective of the invention is to provide a novel conductor-dielectric integrated circuit structure which provides good interface properties while still having preferred conductive materials available for connectivity to successive circuitry.
Yet another objective of the invention is to provide a novel lower cost capacitor structure which has high capacitance value while exhibiting good adhesion at the conductor-dielectric interface.
SUMMARY OF THE INVENTION
These and other objectives are realized by the present invention which provides a structure and method for providing an interface with an oxide surface which exhibits both high adhesion and preferred electrical properties. The method involves providing a partial layer of a first material, chosen for its electrical properties, whereby the partial layer has openings through which areas of the oxide surface are exposed. Establishment of the partial layer is followed by deposition of a continuous layer of a second material, selected for its preferred physical interface properties, i.e., adhesion. The continuous layer of the second material is deposited over the partial layer including the exposed areas of the oxide surface. The second material will adhere to the exposed areas of oxide, while the first material will provide a discrete interface with the oxide.
For integrated circuit capacitors having electrodes abutting a thin film of high dielectric constant material, the electrodes comprise first and second conductors. The first conductor, preferably comprising a relatively inert metal, is provided in a thin, partial layer adjacent the surface of the dielectric material. A continuous layer of a different conductor, exhibiting good adhesive properties, is then deposited contacting the partial layer of the first conductor and the exposed dielectric. The latter conductor of the continuous layer adheres to the areas of exposed dielectric to form strong pockets of adhesion, which are sufficient to maintain the physical integrity of the interface. The second conductor layer provides not only the structural adhesive strength but can also provide the preferred connectivity conductor at the top surface of the upper electrode of the capacitor structure, while the first material in the thin discontinuous layer provides the desired electrical properties so that the overall capacitance of the structure is optimal, and is improved over that of prior art structures having single, continuous layers of reactive metal.
REFERENCES:
patent: 3830657 (1974-08-01), Farrar
patent: 5182232 (1993-01-01), Chhabra et al.
patent: 5409861 (1995-04-01), Choi
IBM Technical Disclosure Bulletin, “Low Leakage, Temperature Invariant, High Dielectric Constant Films, using Multilayered Sol-Gel Fabrication”, vol. 37, No. 9, Sep.1994, pp. 27-28.
Laibowitz Robert Benjamin
Shaw Thomas McCarroll
Viggiano Joseph M.
Dougherty Anne Vachon
International Business Machines - Corporation
Nguyen Tuan H.
Trepp Robert M.
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