Method for fabricating a nonvolatile sonos memory device

Details Method for fabricating a nonvolatile sonos memory device Method for fabricating a nonvolatile sonos memory device

2007-07-31

2007-07-31

Smith, Zandra V. (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S261000, C438S265000, C438S267000, C438S954000

Reexamination Certificate

active

11121867

ABSTRACT:
A nonvolatile memory device and a method for fabricating the same is disclosed, to prevent a “smiling” phenomenon in an ONO layer, thereby improving the programming and erasing characteristics, reliability and yield. The device generally includes a semiconductor substrate; a gate insulating layer, a selection gate and a first insulating layer on the semiconductor substrate; an ONO layer formed on the semiconductor substrate including the selection gate; and a control gate formed on the ONO layer at least partially overlapping with the selection gate.

REFERENCES:
patent: 5716862 (1998-02-01), Ahmad et al.
patent: 7009244 (2006-03-01), Jenq et al.
patent: 2003/0087493 (2003-05-01), Jenq et al.
patent: 2005/0227446 (2005-10-01), Kao et al.
patent: 10-0309815 (2001-09-01), None
Sang Hwan Jang and Jae Hyeon Son; Split Gate Type Flash Eeprom Cell and Driving Method Thereof; Korean Patent Abstracts; Published Sep. 11, 2001; Korean Intellectual Property Office, Republic of Korea.

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