Method for fabricating a non-volatile memory device using nano-c

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

438704, 438705, 438743, 438753, 438962, H01L 21336

Patent

active

061658421

ABSTRACT:
The present invention proposes a method for fabricating a non-volatile memory device using nano-crystals with an increased etching rate and an increased oxidation rate at the grain boundary, which is used in high-speed and low power consumption device. The method for fabricating a non-volatile memory device using nano-crystal dots comprises following processes. First process is to fabricate a tunneling dielectric 204 and a thin amorphous silicon continuous film. Second process is to fabricate a poly-silicon layer by poly-crystallizing the amorphous silicon film. Third process is to fabricate nano-crystals 212 by etching the poly-silicon layer. Fourth process is to fabricate an interlayer dielectric 214 on the nano-crystals 212. Fifth process is to attach a poly-silicon film to the interlayer dielectric 214 and fabricate a gate 216 and interconnects 220.

REFERENCES:
patent: 4802951 (1989-02-01), Clark et al.
patent: 5256587 (1993-10-01), Jun et al.
patent: 5714766 (1998-02-01), Chen et al.
patent: 5753559 (1998-05-01), Yew et al.
patent: 5801401 (1998-09-01), Forbes
patent: 5937295 (1999-08-01), Chen et al.
patent: 5943571 (1999-08-01), Schaefer et al.
patent: 5977612 (1999-11-01), Bour et al.
patent: 5989958 (1999-11-01), Forbes
patent: 6009018 (1999-12-01), Forbes
patent: 6013555 (2000-01-01), Yew et al.
patent: 6025627 (2000-02-01), Forbes et al.
patent: 6060743 (2000-05-01), Sugiyama et al.
patent: 6087197 (1999-01-01), Erigushi et al.
patent: 6087679 (1998-07-01), Yamazaki et al.
patent: 6090666 (2000-07-01), Ueda et al.
Shen et al, "Ultra fast write speed, long refresh time, low power F-N operated volitile memory cell with stacked nanocrystalline Si film," IEEE IEDM 96, pp. 515-1996.
Tiwari et al., "Volatile and Non-Volatile Memories in Silicon with Nano-Crystal Storage," IEEE International Electron Device Meeting pp. 521-524, 1995.
Hanafi et al., "Fast and Long Retention-Time Nano-Crystal Memory," IEEE Transactions On Electron Devices 43:9, 1553-1558, Sep. 1996.
Fukuda et al., "Resonant tunneling through a self-assembled Si quantum dot," American Institute of Physics, Appl. Phys. Lett. 70(70):2291-2293, Apr. 28, 1997.
Kim et al., "Room Temperature Single Electron Effects in Si Quantum Dot Memory with Oxide-Nitride Tunneling Dielectrics," IEEE International Electron Device Meeting pp. 111-114, 1998.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for fabricating a non-volatile memory device using nano-c does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for fabricating a non-volatile memory device using nano-c, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating a non-volatile memory device using nano-c will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-994006

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.