Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-04-18
1998-12-01
Chang, Joni
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438279, H01L 218234, H01L 218246
Patent
active
058438238
ABSTRACT:
A multi-stage read only memory (ROM) device and a method for fabricating the same. The device includes a source/drain pole and a gate in a trench, wherein the gate intersects the source/drain pole at an angle to form a number of memory cells. The fabrication of the multi-stage ROM include two encoding processes. The first encoding process includes implantation of impurity ions in a portion of the memory cells to adjust the threshold voltage, so that some of the memory cells have a first threshold voltage and the others have a second threshold voltage. The second encoding process includes implanting the side-walls of the gate trench of a portion of the memory cells to form a number of stop diffusion regions, so that some of the memory cells have a first effective channel width and the others have a second effective channel width. As a result, the memory cells of a ROM are of four types with different combinations of threshold voltages and effective channel widths.
REFERENCES:
patent: 5051796 (1991-09-01), Gill
patent: 5514605 (1996-05-01), Asai et al.
patent: 5539234 (1996-07-01), Hong
Chang Joni
United Microelectronics Corp.
LandOfFree
Method for fabricating a multi-stage ROM structure does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for fabricating a multi-stage ROM structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating a multi-stage ROM structure will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2395359