Method for fabricating a multi-stage ROM

Details Method for fabricating a multi-stage ROM Method for fabricating a multi-stage ROM

1997-04-23

1998-08-11

Chang, Joni

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438277, 438282, H01L 218246, H01L 218234

Patent

active

057926972

ABSTRACT:
A method of forming a multi-stage ROM which replaces the multiple code implant. A gate oxide layer, a first polysilicon layer, an oxide layer, a second polysilicon layer and a silicon nitride layer are formed over a substrate in succession. Then, the silicon nitride layer, the second polysilicon layer, the oxide layer, the first polysilicon layer and the gate oxide layer are patterned at the same time so that a number of double-layer polysilicon lines remain. An implantation is performed on an exposed region to form a number of source/drain regions which serve as bit lines. The double-layer polysilicon lines are patterned to form a number of gates, wherein each of the gates combines with the adjacent source/drain regions to form four memory cells. Two coding processes are performed to accomplish the process of manufacturing a multi-stage ROM.

REFERENCES:
patent: 4180826 (1979-12-01), Shappir
patent: 5394356 (1995-02-01), Yang

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