Method for fabricating a MOSFET with raised STI isolation self-a

Details Method for fabricating a MOSFET with raised STI isolation self-a Method for fabricating a MOSFET with raised STI isolation self-a

1996-12-23

2000-02-08

Bowers, Charles

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438424, 257301, 257305, 257397, 257623, H01L 2108, H01L 2976, H01L 2900

Patent

active

060227818

ABSTRACT:
A semiconductor structure comprising a transistor having a gate conductor that has first and second edges bounded by raised isolation structures (e.g. STI). A source diffusion is self-aligned to the third edge and a drain diffusion is self-aligned to the fourth edge of the gate electrode.

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