Method for fabricating a memory device having reverse LDD

Details Method for fabricating a memory device having reverse LDD Method for fabricating a memory device having reverse LDD

2005-08-30

2005-08-30

Fourson, George (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

Reexamination Certificate

active

06936515

ABSTRACT:
A method for fabricating a semiconductor device. Specifically, a method that includes forming a source and drain region in a periphery transistor, exhibiting a channel width between the source and drain regions suitable for operation at predetermined voltages. After forming the source and drain regions, to eliminate diffusion of lightly doped drain regions resulting from a later formation of the source and drain regions, forming the lightly doped drain regions adjacent to the source and drain regions of the periphery transistor. After forming the lightly doped drain regions in the periphery transistor, the method includes forming a source region and a drain region in a core memory cell, independent of forming the source and drain regions in the periphery transistor.

REFERENCES:
patent: 5830794 (1998-11-01), Kusunoki et al.
patent: 6133096 (2000-10-01), Su et al.
patent: 6238977 (2001-05-01), Sung
patent: RE37959 (2003-01-01), Komori et al.
patent: 6610565 (2003-08-01), Kim et al.
patent: 2002/0173099 (2002-11-01), Chern et al.

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