Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-10-17
2006-10-17
Tsai, H. Jey (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S246000, C438S386000
Reexamination Certificate
active
07122423
ABSTRACT:
The invention provides a method for fabricating a memory cell for storing electric charge, which has a substrate (101), which forms a first electrode, a trench-like recess (102) etched into the substrate (101), conductive material, which is provided as a projection in a central region of the trench-like recess (102) and spaced apart from the side walls (107) of the trench-like recess (102) and is in electrical contact with the substrate at the base (104) of the trench-like recess (102), a dielectric layer (108), which has been deposited on the side walls (107) of the trench-like recess (102), the base (104) of the trench-like recess (102) and the surfaces of the conductive material (105), and an electrode layer (110), which has been deposited on the dielectric layer (108) and forms a second electrode.
REFERENCES:
patent: 6319787 (2001-11-01), Enders et al.
patent: 7056832 (2006-06-01), Chang et al.
patent: 2002/0167405 (2002-11-01), Short
patent: 199 29 859 (2000-04-01), None
patent: 102 20 129 (2002-11-01), None
Gutsche Martin
Seidl Harald
Infineon - Technologies AG
Jenkins Wilson Taylor & Hunt, P.A.
Tsai H. Jey
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