Method for fabricating a load in a static random access memory

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438238, 438268, 438270, 438152, 437 47, 437 48, 437 67, H01L 218234

Patent

active

060837861

ABSTRACT:
A method for fabricating a load on a substrate is disclosed. The method includes the steps of: forming a dielectric layer over the substrate; patterning the dielectric layer to form a window in which a portion of the substrate is exposed; forming a metal plug in the window; forming a conducting layer over the substrate; thermally processing the metal plug and the conducting layer, thereby forming a silicide interface; and defining a predetermined length of the conducting layer from the silicide interface as a load.

REFERENCES:
patent: 5866451 (1999-02-01), Yoo et al.
patent: 5879971 (1999-03-01), Witek

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