Method for fabricating a high-voltage semiconductor device

Details Method for fabricating a high-voltage semiconductor device Method for fabricating a high-voltage semiconductor device

1998-12-08

1999-11-02

Bowers, Charles

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438232, 438419, 438519, 438275, H01L 218238

Patent

active

059769238

ABSTRACT:
A method for fabricating high-voltage semiconductor devices is disclosed, in which a P-well and a N-well are first formed over the substrate, where a plurality of P-wells and N-wells used as isolation regions and drift regions are further formed therein. More shallot P-type and N-type regions are subsequently formed in the drift regions and isolation regions, so as to increase the breakdown voltage and enhance the current-driving performance. In addition, a deepened isolation doping, can also increase the latch up capability, resulting in less area required for fabricating a device.

REFERENCES:
patent: 5376568 (1994-12-01), Yang
patent: 5501994 (1996-03-01), Mei
patent: 5550064 (1996-08-01), Yang
patent: 5747850 (1998-05-01), Mei
patent: 5831320 (1998-11-01), Kwon et al.
patent: 5907173 (1999-05-01), Kwon et al.

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