Method for fabricating a high bias metal oxide semiconductor dev

Details Method for fabricating a high bias metal oxide semiconductor dev Method for fabricating a high bias metal oxide semiconductor dev

1998-06-17

1999-04-06

Brown, Peter Toby

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438222, 438224, 438229, 438259, 438270, 438296, 438430, 438437, H01L 218238

Patent

active

058917705

ABSTRACT:
A method for fabricating a high bias metal oxide semiconductor device includes using a trench structure instead of the conventional field oxide layer, constructing a structure with a vertical voltage gradient and performing punch implantation and threshold voltage implantation under a doped N.sup.- region and a doped P.sup.- region to increase the channel length.

REFERENCES:
patent: 4729964 (1988-03-01), Natsuaki et al.

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