Method for fabricating a hemispherical silicon grain layer

Details Method for fabricating a hemispherical silicon grain layer Method for fabricating a hemispherical silicon grain layer

1998-12-01

2000-09-26

Zarabian, Amir

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438195, 437 60, H01L 218234

Patent

active

06124161&

ABSTRACT:
A method for forming a hemispherical silicon grain (HSG) layer on a polysilicon electrode is provided. The method is suitable for a substrate, which has a dielectric layer over the substrate with an opening to expose the substrate, and a polysilicon layer is formed over the substrate. A portion of the polysilicon layer is removed above dielectric layer other than the opening region. Each sidewall of the polysilicon layer is slanted so that a trapezoidal polysilicon base is formed. A buffer layer is formed over the trapezoidal polysilicon base. An ion implantation process is performed to form an amorphous silicon layer with sufficient depth on a top surface region of the trapezoidal polysilicon base. The buffer layer includes silicon oxide or silicon nitride. During ion implantation, oxygen or nitrogen elements can also be bombarded into the amorphous silicon layer so as to buffer the amorphous silicon layer to be re-crystallized. A selective HSG layer is formed on the trapezoidal polysilicon electrode base.

REFERENCES:
patent: 5639685 (1997-06-01), Zahurak et al.
patent: 5877052 (1999-03-01), Lin et al.
patent: 5913119 (1999-06-01), Lin et al.

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