Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-08-04
2000-10-10
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438594, H01L 218247
Patent
active
061301310
ABSTRACT:
A method for fabricating a flash memory forms a diffusion region in the substrate at one side of the first polysilicon layer. Formation of the diffusion region is preceded by a number of steps. First, the first polysilicon layer is patterned. Then, an implantation step is performed to self-align the polysilicon layer, thereby forming implantation regions in the substrate at both sides of the first polysilicon. One of these implantation region is used for a buried bit line. Subsequently, a dielectric layer is formed over the first polysilicon layer, and the second polysilicon layer is patterned to form a control gate and the first polysilicon layer is further patterned to form a floating gate.
REFERENCES:
patent: 5427970 (1995-06-01), Hsue et al.
patent: 5510284 (1996-04-01), Yamauchi
patent: 5877054 (1999-03-01), Yamauchi
patent: 5882970 (1999-03-01), Lin et al.
Chaudhari Chandra
United Microelectronics Corp.
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