Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-07-30
1999-10-19
Bowers, Charles
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438301, H01L 21336
Patent
active
059677945
ABSTRACT:
A method of making a semiconductor device with a shallow (on the order of 50 nm) PN junction depth includes the steps of forming, on a region of a semiconductor substrate in which an impurity diffusion region having the shallow PN junction depth is to be formed, a selectively grown silicon layer (raised layer) containing a substance such as carbon which easily combines with point defects in the semiconductor substrate or a substance such as nitrogen which prevents an impurity providing an electrical conductivity from diffusing, ion-implanting an impurity of one conductivity type into the selectively grown silicon layer, and forming the diffusion region by activating the implanted impurity of one conductivity type and diffusing the impurity of one conductivity type into the semiconductor substrate, by means of heat treatment.
REFERENCES:
patent: 4705591 (1987-11-01), Carle et al.
patent: 4755865 (1988-07-01), Wilson et al.
patent: 4766477 (1988-08-01), Nakagawa et al.
patent: 4772927 (1988-09-01), Saito et al.
patent: 4968384 (1990-11-01), Asano
patent: 4998150 (1991-03-01), Rodder et al.
patent: 5463978 (1995-11-01), Larkin et al.
patent: 5683934 (1997-11-01), Candelaria
Ban, I.; Ozturk, M. C.; and Demirlioglu, E.K. "Suppression of Oxidation Enhanced Boron Diffusion in Silicon by Carbon Implantattion and Characterization of MOSFET's with Carbon Implanted Channels." IEEE Trans. Electron Dev., vol. 44, No. 9, pp. 1544-1551, Sep. 1997.
Bowers Charles
NEC Corporation
Thompson Craig
LandOfFree
Method for fabricating a field effect transistor having elevated does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for fabricating a field effect transistor having elevated, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating a field effect transistor having elevated will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2047917