Method for fabricating a field effect transistor having elevated

Details Method for fabricating a field effect transistor having elevated Method for fabricating a field effect transistor having elevated

1997-07-30

1999-10-19

Bowers, Charles

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438301, H01L 21336

Patent

active

059677945

ABSTRACT:
A method of making a semiconductor device with a shallow (on the order of 50 nm) PN junction depth includes the steps of forming, on a region of a semiconductor substrate in which an impurity diffusion region having the shallow PN junction depth is to be formed, a selectively grown silicon layer (raised layer) containing a substance such as carbon which easily combines with point defects in the semiconductor substrate or a substance such as nitrogen which prevents an impurity providing an electrical conductivity from diffusing, ion-implanting an impurity of one conductivity type into the selectively grown silicon layer, and forming the diffusion region by activating the implanted impurity of one conductivity type and diffusing the impurity of one conductivity type into the semiconductor substrate, by means of heat treatment.

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Ban, I.; Ozturk, M. C.; and Demirlioglu, E.K. "Suppression of Oxidation Enhanced Boron Diffusion in Silicon by Carbon Implantattion and Characterization of MOSFET's with Carbon Implanted Channels." IEEE Trans. Electron Dev., vol. 44, No. 9, pp. 1544-1551, Sep. 1997.

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