Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-12-10
2000-12-05
Bowers, Charles
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438207, 438225, 257395, 257396, 257509, H01L 218238
Patent
active
061565962
ABSTRACT:
A method for fabricating a CMOS image sensor resolves the abnormally elevated output at the first pixel without degrading the integration of the device. The method of the invention lengthens the field oxide layer within the scribe-line region to ensure the substrate and the conducting layer thereon are properly insulated. That prevents the leakage of the carriers generated by the Electro-optical effect to resolve the problem of an abnormally elevated output at the first pixel. In addition, a mask protects the dielectric layer on the scribe-line region from being etched, so the steep difference on the step height is improved to resolve the peeling of the photoresist. The field oxide layer under the dielectric layer covered by the dielectric layer then provides a better insulation.
REFERENCES:
patent: 5622885 (1997-04-01), Merrill et al.
patent: 5627398 (1997-05-01), Zlebir et al.
patent: 5895237 (1999-04-01), Chan et al.
patent: 5908308 (1999-06-01), Barsan et al.
patent: 6037211 (2000-03-01), Jeng et al.
Blum David S
Bowers Charles
United Microelectronics Corp.
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