Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1995-08-29
1999-02-02
Loring, Susan A.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438199, 438237, H01L 218238, H01L 2182
Patent
active
058664580
ABSTRACT:
A CMOS fabrication method includes the steps of providing a substrate having a surface, forming a first conductive well adjacent to the surface of the substrate, forming a second conductive well adjacent to the surface of the substrate, a portion of the first conductive well overlapping a portion of the second conductive well, forming a field oxide in the overlapping portion of the first and second conductive wells forming a first gate over the first conductive well and a second gate over the second conductive well, masking the first conductive well and implanting second conductive impurities on the second conductive well and masking the second conductive well and implanting first conductive impurities on the first conductive well.
REFERENCES:
patent: 5208473 (1993-05-01), Komori et al.
patent: 5292671 (1994-03-01), Odanaka
LG Semicon Co. Ltd.
Loring Susan A.
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