Method for etching passivation layer of wafer

Details Method for etching passivation layer of wafer Method for etching passivation layer of wafer

1998-09-25

2002-08-27

Utech, Benjamin L. (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

C438S704000

Reexamination Certificate

active

06440859

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to semiconductor wafers and more specifically to an improved method for etching a passivation layer of the wafer.
Introduction
In a familiar process for manufacturing semiconductor chips, an ingot of silicon is formed and then is cut into thin circular wafers. One surface of a wafer will later have devices formed on it and this side of the wafer is called the device side. The other surface of the wafer is called the back side (or the back).
After the steps for forming the devices have been completed and before the wafer is broken along scribe lines to separate the individual chips, the back side of the wafer is ground to give the wafer a thickness of, for example, 300 microns to 380 microns (from a starting Thickness of for example 680 microns). The additional wafer thickness during the device forming steps gives the wafer strength to keep the wafer from breaking during handling.
A protective tape, called a grinding tape, is put on the device side of the wafer to protect the device surface while the back side is being ground. The grinding tape commonly has a plastic adhesive layer formed on a backing of a suitable material.
After the operation of grinding the back of the wafer, the grinding tape is removed. To remove the grinding tape, a second tape is applied to the grinding tape. A roller is used to roll the second tape against the grinding tape to get good adhesion. Then the second tape is removed and the grinding tape comes off the with the second tape.
Particles of the grinding tape adhesive may adhere to the surface of the wafer, particularly at the edges of etching of the passivation layer. These tape particles can interfere with subsequent processing steps. In particular, metal bonding pads are formed along the edges of the chip, and the adhesive can stick to the surface of the pads and interfere with later process steps in which wires are bonded to the pads.
SUMMARY OF THE INVENTION
We have found that the probable reason the adhesive on the grinding tape adheres to the wafer is that the plastic adhesive is pressed into the groove where the passivation layer has been etched. We have also found that the adhesive of the grinding tape is cut by sharp edges where the surface of the wafer intersects with the walls of grooves etched in the passivation layer. These sharp edges are formed when the grooves are etched anisotropically and have nearly flat vertical walls. The etch is called anisotropic because it acts preferentially in one direction; it can maker the hole relatively deep without at the same time making the hole wide.
We think that the particles tear away from the backing when the tape is pealed away from the wafer and then adhere to the surface of the wafer.
According to one feature of this invention, the passivation etch is performed in a way that makes the edges beveled or rounded. More specifically they are given a concave bevel. The beveled edges are less likely. to cut into the adhesive tape and the adhesive is readily removed as the tape is pealed away from the wafer back.
We achieve this shape by combining the conventional anisotropic etch with an isotropic etch that rounds the edges. The isotropic etch proceeds substantially equally in all directions and thus enlarges the groove at the otherwise sharp corners.
The Prior Art
Lin U.S. Pat. No. 5,246,883 relates to a problem associated with via holes in a semiconductor device. If these holes have sharp corners, a mezal layer formed over the structure is thinner at these sharp edges.
FIGS. 1 and 2
show a prior method in which a hole is formed through layers
4
,
3
and
2
(from top to bottom). The upper layer
4
has a faster etch rate than the next layer
3
and an isotropic etch partly through layer
4
produces a depression with a rounded lower edge. Thereafter, an isotropic etch is formed Through the remainder of layer
4
and through. layers
3
and
2
. The upper layer has concave edges that are sharp at the upper surface of layer
4
and at the beginning of the anisotropic etch.
In
FIGS. 3-7
of Lin, a via hole with rounded edges is formed through layers
22
,
20
,
18
and
16
(from top to bottom). The upper layer
22
has a faster etch rate than the next layer
22
, and an isotropic etch causes rounding at the upper edges. Thereafter an isotropic etch completes the hole through layers
18
, and
16
.


REFERENCES:
patent: 5119171 (1992-06-01), Lesk et al.
patent: 5246883 (1993-09-01), Lin et al.
patent: 5380401 (1995-01-01), Jones et al.
patent: 5445994 (1995-08-01), Gilton
patent: 5565378 (1996-10-01), Harada et al.
patent: 5593927 (1997-01-01), Farnworth et al.
patent: 5731243 (1998-03-01), Peng et al.
patent: 5874317 (1999-02-01), Stolmeijer

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