Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Multiple layers
Reexamination Certificate
2000-01-07
2002-06-04
Nguyen, Tuan H. (Department: 2813)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Multiple layers
C438S769000, C438S770000, C438S775000, C438S786000, C438S287000
Reexamination Certificate
active
06399519
ABSTRACT:
TECHNICAL FIELD
The present invention relates to the fabrication of semiconductor devices, and more particularly to establishing field effect transistor (FET) gate insulators.
BACKGROUND OF THE INVENTION
Semiconductor chips or wafers are used in many applications, including as integrated circuits and as flash memory for hand held computing devices, wireless telephones, and digital cameras. Regardless of the application, it is desirable that a semiconductor chip hold as many circuits or memory cells as possible per unit area. In this way, the size, weight, and energy consumption of devices that use semiconductor chips advantageously is minimized, while nevertheless improving the memory capacity and computing power of the devices.
It can readily be appreciated that it is important to electrically isolate various components of an integrated circuit from each other, to ensure proper circuit operation. As one example, in a transistor, a gate is formed on a semiconductor substrate, with the gate being insulated from the substrate by a very thin dielectric layer, referred to as the “gate oxide” or “gate insulator”. As the scale of semiconductor devices decreases, the thickness of the gate insulator layer likewise decreases.
As recognized herein, at very small scales, the gate insulator can be become so thin that otherwise relatively small encroachments into the gate insulator layer by sub-oxides from the substrate and from adjacent polysilicon connector electrodes can reduce the insulating ability of the gate insulator layer. This poses severe problems because under these circumstances, even very minor defects in the substrate can create electron leakage paths through the gate insulator, leading to catastrophic failure of the transistor.
To circumvent this problem, alternatives to traditional gate oxide materials, such as high-k dielectric materials including nitrides and oxynitrides that can be made very thin and still retain good insulating properties, have been proposed. Unfortunately, it is thought that these materials can degrade the performance of the transistor. Nitride, in particular, has been considered undesirable because it promotes unwanted leakage of electrons through the gate insulator layer.
Furthermore, as the gate insulator layer becomes very thin, e.g., on the order of nineteen Angstroms (19Å), device integration becomes highly complicated. Specifically, it is necessary to etch portions of the polysilicon electrodes down to the substrate, but stopping the etch on a very thin, e.g., 19Å gate insulator layer without pitting the substrate underneath becomes problematic. Accordingly, the present invention recognizes that it is desirable to provide a gate insulator layer that can be made very thin as appropriate for very small-scale transistors while retaining sufficient electrical insulation properties to adequately function as a gate insulator, and while retaining sufficient physical thickness to facilitate device integration, without degrading performance vis-a-vis oxide insulators.
BRIEF SUMMARY OF THE INVENTION
A method for making a semiconductor device includes providing a semiconductor substrate, and establishing an oxide base film on the substrate. The substrate is annealed, preferably in ammonia at temperatures up to eleven hundred degrees Celsius (1100° C.) to reduce the effective thickness of the base film, after which a Nitride film is established over the base film and the substrate oxidized, preferably with the substrate disposed in Nitrogen Oxide at a temperature of 700° C. to 1100° C. for about one minute or longer. FET gates are next formed on portions of the film.
In one preferred embodiment the base film defines a thickness of no more than fifteen Angstroms (15Å), and more preferably the base film defines a thickness of no more than twelve Angstroms (12Å). The preferred Nitride film, on the other hand, has a thickness of between eight Angstroms and fifteen Angstroms (8Å-15Å).
Other features of the present invention are disclosed or apparent in the section entitled “DETAILED DESCRIPTION OF THE INVENTION”.
REFERENCES:
patent: 4436770 (1984-03-01), Nishizwa et al.
patent: 5436481 (1995-07-01), Egawa et al.
patent: 5683929 (1997-11-01), Ohi et al.
patent: 6037651 (2000-03-01), Hasegawa
patent: 6069041 (2000-05-01), Tanigami et al.
Advanced Micro Devices , Inc.
LaRiviere Grubman & Payne, LLP
Nguyen Thanh
Nguyen Tuan H.
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