Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Patent
1997-03-14
1999-07-13
Ellis, Richard L.
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
39580028, 39518501, G06F 1216
Patent
active
059241225
ABSTRACT:
An error recovery method and apparatus has specific application in a networking arrangement having a plurality of individual processing nodes which communicate via shared memory space. For error recovery, the system uses a reliable error count, the value of which is maintained by all of the nodes. When an error is detected, the error count is incremented, and all of the active nodes are provided with the new error count. Any of the nodes can run the error recovery method, and may gain exclusive access to the network by acquiring an error recovery spinlock. Once the spinlock is acquired, the node holding the spinlock increments the error count and confirms that all active nodes have received the new error count. The spinlock is thereafter released.
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Cardoza Wayne M.
Gillett Jr. Richard B.
Kaufman Charles
Morse Kathleen D.
Chichester Ronald L.
Compaq Computer Corp.
Ellis Richard L.
Katz Paul N.
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