Method for encapsulating a high-K gate stack by forming a...

Details Method for encapsulating a high-K gate stack by forming a... Method for encapsulating a high-K gate stack by forming a...

2011-03-01

2011-03-01

Pham, Thanhha (Department: 2894)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S591000, C438S791000, C257SE21626

Reexamination Certificate

active

07897450

ABSTRACT:
Encapsulation of a gate stack comprising a high-k dielectric material may be accomplished on the basis of a silicon nitride material that is deposited in a sequence of two deposition processes, in which the first process may be performed on the basis of a moderately low process temperature, thereby passivating sensitive surfaces without unduly contaminating the same, while, in a second deposition process, a moderately high process temperature may be used to provide enhanced material characteristics and a reduced overall cycle time compared to conventional ALD or multi-layer deposition techniques.

REFERENCES:
patent: 6228721 (2001-05-01), Yu
patent: 6245620 (2001-06-01), Jang et al.
patent: 6281075 (2001-08-01), Yuan et al.
patent: 2002/0197789 (2002-12-01), Buchanan et al.
patent: 2003/0181015 (2003-09-01), Komatsu
Translation of Official Communication from German Patent Office for German Patent Application No. 10 2008 016 437.2-33 dated Nov. 18, 2008.

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