Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-10-14
2000-07-11
Bowers, Charles
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438303, H01L 21336
Patent
active
060872357
ABSTRACT:
A field effect transistor is fabricated to have elevated drain and source contact structures with prevention of short-channel effects and leakage current which may result due to the formation of facetted surfaces on the elevated drain and source contact structures near the gate of the field effect transistor. The field effect transistor includes a drain extension implant, a source extension implant, a gate dielectric, a gate structure disposed over the gate dielectric, and a first spacer disposed on sidewalls of the gate dielectric and of the gate structure. An elevated drain contact structure is selectively grown on the drain extension implant and has a drain facetted surface facing toward the first spacer on the sidewall of the gate structure. Similarly, an elevated source contact structure is selectively grown on the source extension implant and has a source facetted surface facing toward the first spacer on the sidewall of the gate structure. A second spacer is formed to cover the drain facetted surface and the source facetted surface before dopant implantation into and silicide formation on the elevated drain and source contact structures. In this manner, the dopant is prevented from being implanted into the drain facetted surface and the source facetted surface such that short-channel effects are minimized in the field effect transistor of the present invention. In addition, formation of silicide on the drain facetted surface and the source facetted surface is prevented to minimize leakage current through the drain and source extension implants of the field effect transistor of the present invention.
REFERENCES:
patent: 5079180 (1992-01-01), Rodder et al.
patent: 5677214 (1997-10-01), Hsu
patent: 5967794 (1999-10-01), Kodama
Advanced Micro Devices , Inc.
Bowers Charles
Chen Jack
Choi Monica H.
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