Method for determining deskew margins in parallel interface...

Details Method for determining deskew margins in parallel interface... Method for determining deskew margins in parallel interface...

2005-05-10

2005-05-10

Ton, David (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Skew detection correction

C714S798000

Reexamination Certificate

active

06892334

ABSTRACT:
Disclosed is a method for automatically testing the deskew setting for the clock in a parallel data interface. The deskew value is varied to a high and a low limit to the point where errors occur when transmissions occur. After determining the high and low operable limits of the deskew values, an optimum deskew setting may be determined and set for the system. The present invention may be used as a design verification technique, for optimizing a system after integration, or for further optimization of the deskew value after performing a training pattern for optimizing transmission performance.

REFERENCES:
patent: 3456237 (1969-07-01), Collins
patent: 6536025 (2003-03-01), Kennedy et al.
patent: 6636993 (2003-10-01), Koyanagi et al.
patent: 6760803 (2004-07-01), Gauvin et al.
patent: 6798946 (2004-09-01), Bonja et al.

Affiliated with

Also associated with

Rating

Method for determining deskew margins in parallel interface... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for determining deskew margins in parallel interface..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for determining deskew margins in parallel interface... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3382483