Method for defining a minimum pitch in an integrated circuit...

Details Method for defining a minimum pitch in an integrated circuit... Method for defining a minimum pitch in an integrated circuit...

2005-10-18

2005-10-18

Chaudhari, Chandra (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S947000

Reexamination Certificate

active

06955961

ABSTRACT:
A method for defining a minimum pitch in an integrated circuit beyond photolithographic resolution controls the defined pitches of the target layer by use of polymer spacer, photo-insensitive polymer plug and polymer mask during the process, so as to achieve the minimum pitch of the target layer beyond photolithographic resolution. Applied to memory manufacture, this method is capable of simultaneously overcoming the process difficulty of significant difference between polysilicon pitches in memory array region and periphery region.

REFERENCES:
patent: 5328810 (1994-07-01), Lowrey et al.
patent: 5595941 (1997-01-01), Okamoto et al.
patent: 5618383 (1997-04-01), Randall
patent: 6835662 (2004-12-01), Erhardt et al.

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