Method for creating diffusion areas for sources and drains witho

Details Method for creating diffusion areas for sources and drains witho Method for creating diffusion areas for sources and drains witho

1999-02-04

2000-10-17

Booth, Richard

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438262, H01L 218247

Patent

active

061330957

ABSTRACT:
A method for manufacturing a memory array having a plurality of memory cells thereon and diffusion areas therebetween includes the steps of laying down a layer of silicon nitride, defining the diffusion areas and creating diffusion oxides over the diffusion areas. Both steps of laying down and defining occur without etching any part of the layer of silicon nitride. The step of creating diffusion oxides includes the steps of creating porous silicon nitride from portions of the silicon nitride layer wherever diffusion oxides are desired (typically by laying down photoresist in a desired pattern and bombarding the silicon nitride layer with ions) and oxidizing both the porous silicon nitride and the silicon substrate through the porous silicon nitride thereby to create silicon oxy-nitride and silicon dioxide, respectively. The present invention also includes a semiconductor chip having diffusion or bit line oxides formed of at least silicon oxy-nitride.

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"Ion Implanation in Silicon" article by K.A. Pickar, found in a book "Applied Solid State Science," vol. 5, R. Wolfe, Ed., Academic Press, New York, 1975.

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