Method for correcting crosstalk

Details Method for correcting crosstalk Method for correcting crosstalk

2006-01-03

2006-01-03

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

06983436

ABSTRACT:
In a semiconductor integrated circuit, there is provided a method for correcting crosstalk, which exerts an influence via coupling capacitance between wiring by the signal transitions between adjacent wiring, comprising the step of creating a candidate for buffer division, the step of creating a candidate for cell movement, or the step of victim net logic synthesis. Thereby, the crosstalk is corrected through the buffer division, the cell movement, or an increase of elements in number by logic decomposition, logic inversion and a change of fan-outs in number.

REFERENCES:
patent: 2002/0046389 (2002-04-01), Hirakimoto et al.
patent: 2002/0104066 (2002-08-01), Irie
patent: 11-040677 (2001-04-01), None
Synopsys, Inc., “AstroPrimer Introduction to Astro Timing Optimized Layout Release” 2001.2, users manual, U.S., SynopsysCorporation, Feb. 2001, pp. 13 to 20.

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