Semiconductor device having multiple insulation layers

Details Semiconductor device having multiple insulation layers Semiconductor device having multiple insulation layers

2006-01-24

2006-01-24

Tran, Thien F (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Passive components in ics

C257S530000, C257S665000

Reexamination Certificate

active

06989577

ABSTRACT:
A semiconductor device includes a multiple insulation layer structure in which multiple insulation layers each having interconnection layer are built up and either one of the interconnection layer forming a fuse is blown in order to select a spare cell to relieve a defective cell; and an opening area corresponding to said fuse, the opening being formed on one or more insulation layers disposed above the layer which includes the fuse, wherein a side wall position corresponding to the opening of the first protective insulation film formed on the top layer of the multiple layers and a side wall position corresponding to the opening of the second protective insulation film formed on the first protective insulation film are continuous at the boundary thereof.

REFERENCES:
patent: 6046488 (2000-04-01), Kawasaki et al.
patent: 6372554 (2002-04-01), Kawakita et al.
patent: 05-218205 (1993-08-01), None
patent: 07-037988 (1995-02-01), None
patent: 11-111847 (1999-04-01), None
patent: 2000-332114 (2000-11-01), None
U.S. Appl. No. 09/604,791 filed Jun. 28, 2000.
U.S. Appl. No. 09/411,590 filed Oct. 4, 1999.

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