Method for controlling the etching profile of a layer of an inte

Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step

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437229, 437187, 437225, 156664, 156665, H01L 21306

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active

053783093

ABSTRACT:
The invention concerns a process for slope etching a layer of an integrated circuit. The layer to be etched is coated with a masking photoresist layer. The process consists of jointly performing a passivation of the etching flank of the layer to be etched and a nonisotropic erosion of the masking photoresist layer, which makes it possible to control the slope of the etching flank of the layer to be etched.

REFERENCES:
patent: 4436584 (1984-03-01), Bernacki et al.
patent: 4678540 (1987-07-01), Uchimura
S. Wolf, Silicon Processing for the VLSI Era, vol. 1, Lattice Press, Sunset Beach Calif., 1986, pp. 551-555.
Oda et al., "Undercutting Phenomena in Al Plasma Etching", Japanese Journal of Applied Physics, vol. 19, No. 7, Jul. 1980 pp. 405-408.
Proceedings of the 3rd Int., IEEE VLSI Multilevel Interconnection Conf., 9-10 Jun. 1986, Santa Clara, Calif., USA, pp. 198-204; Abraham: "Sidewall Tapering of Plasma Etched . . . ".
Japanese Journal of Applied Physics, Part 2, vol. 28, No. 6. Tokyo Japan, Jun. 1989, pp. L1070-L1072, Ohno et al., "Reactive Ion Etching of Copper Films in SiCl4 and N2 . . . ".
Proceedings of the SPIE, vol. 923, Electron-Beam, X-Ray and Ion-Beam Technology, . . . 2-4 Mars 1988, Santa Clara, Calif., US, pp. 55-62, Zwicker et al., "Fabrication . . . :".
Journal of the Electrochemical Society, vol. 137, No. 6, Jun. 1990, Manchester, N.H., USA, pp. 1907-1911; KUO: "Factors affecting the Molybdenum line slope by . . . ".

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