Method for controlling spacer oxide loss

Details Method for controlling spacer oxide loss Method for controlling spacer oxide loss

2007-02-20

2007-02-20

Trinh, Michael (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S595000, C438S230000, C438S197000

Reexamination Certificate

active

11085217

ABSTRACT:
The formation of gate spacers on the sides of a gate structure on a semiconductor substrate is provided. In one embodiment, a gate structure is formed on a gate insulator layer of the semiconductor substrate. A liner layer is formed over the exposed surfaces of the substrate, the gate insulator layer, and the gate structure. A layer of gate spacer material is formed over the liner layer. Thereafter, gate spacers are formed from the layer of gate spacer material. A protection layer is formed over portions of the liner layer, gate structure, and the gate spacers. The protection layer is etched back. A first wet etch procedure is performed to remove exposed portions of the liner layer. The protection layer is removed and a second wet etch procedure is performed to remove substantially a top portion and a bottom portion of the liner layer.

REFERENCES:
patent: 5783475 (1998-07-01), Ramaswami
patent: 5920783 (1999-07-01), Tseng et al.
patent: 6265274 (2001-07-01), Huang et al.
patent: 6764911 (2004-07-01), Hsu et al.
patent: 6777283 (2004-08-01), Maeda

Affiliated with

Also associated with

Rating

Method for controlling spacer oxide loss does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for controlling spacer oxide loss, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for controlling spacer oxide loss will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3873292