Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1982-12-27
1986-03-11
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365233, 365201, G11C 700
Patent
active
045758247
ABSTRACT:
A method for controlling the readout or write-in of a semiconductor memory device, and an apparatus for the same. During the selection of memory cells in a memory cell array to readout or write in data, the steps of selecting the memory cells of a specific address in the memory cell array include accessing the memory cells of the specific address and then and only then accessing the memory cells of the designated address corresponding to address signals input from the outside.
REFERENCES:
patent: 4086662 (1978-04-01), Itoh
patent: 4240139 (1980-12-01), Fukuda et al.
patent: 4405996 (1983-09-01), Stewart
Ooami Kazuo
Tanaka Miki
Fujitsu Limited
Popek Joseph A.
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