Method for controlling column decoder enable timing in...

Details Method for controlling column decoder enable timing in... Method for controlling column decoder enable timing in...

2005-01-04

2005-01-04

Nguyen, Tan T. (Department: 2818)

Static information storage and retrieval

Read/write circuit

Signals

C365S230060, C365S233100

Reexamination Certificate

active

06839291

ABSTRACT:
A method for controlling column decoder enable timing including determining if there is a gap between a data write command and a data read command which occur consecutively; generating a timing control signal for delaying received clock signal for an amount of time which depends on the determination result; and activating a column decoder in response to the timing control signal. Generating a timing control signal includes generating a timing control signal having a first delay time if there is a gap and generating a timing control signal having a second delay time if there is no gap, when the first delay time is shorter than the second delay time. An effect is an increase in the maximum operating frequency of a system for outputting data.

REFERENCES:
patent: 6061295 (2000-05-01), Roh
patent: 6064622 (2000-05-01), Lee et al.
patent: 6151270 (2000-11-01), Jeong
patent: 6154417 (2000-11-01), Kim
patent: 6163498 (2000-12-01), Moon
patent: 6529423 (2003-03-01), Yoon et al.

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