Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
2006-09-19
2006-09-19
Deo, Duy-Vu N (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
C438S692000, C438S693000
Reexamination Certificate
active
07109117
ABSTRACT:
A method for chemical mechanical polishing (CMP) of a shallow trench isolation (STI) structure employs a sequence of slurry polishes. In the first step the substrate is polished with either silica-based slurry or diluted ceria-based slurry. The first polishing is at a higher removal rate than the second polishing step. The polishing proceeds with some planarization but does not expose the polish stop layer. After partial planarization, the high selectivity slurry was used to complete the process. Improved throughput, lower defects and good within wafer uniformity are achieved.
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U.S. Appl. No. 2002/0110995 A1 to Kim, Pub. Date Aug. 15, 2002, Filed Feb. 15, 2001, U.S.C1. 438/427, “Use of Discrete Chemical Mechanical Polishing Processes to Form a Trench Isolation Region”.
Hou Chuan-Ping
Jang Syun-Ming
Tseng Tung-Ching
Yang Li-Jia
Deo Duy-Vu N
Haynes and Boone LLP
Taiwan Semiconductor Manufacturing Company , Ltd.
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