Method for bypassing null-code sections for read-only memory by

Details Method for bypassing null-code sections for read-only memory by Method for bypassing null-code sections for read-only memory by

1995-07-12

1997-04-15

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438 12, 438 4, H01L 21265

Patent

active

056209150

ABSTRACT:
The ROM device comprises a number of memory cells each is constructed based on a MOS transistor, the memory cells in the ROM are arranged into a number of rows and a columns. A number of word lines each connects to the gates of each of the MOS transistors of all the memory cells in each of the rows. A number of bit lines each connects to one of the source/drain pair of each of the MOS transistors of all the memory cells in each of the columns. A multiplexer comprises a number of transmitting transistors, each of the transmitting transistors is connected to a corresponding one of the bit lines, forming a current flow path including the transmitting transistor, the connected bit line, and the memory cells correspondingly connected to the bit line. A sense amplifier is coupled to the multiplexer for sensing the current flowing therethrough the current flow path to output a corresponding sense output signal. The method for bypassing null-code sections to comprise programing the transmitting transistor in the current flow path into an off status when all memory cells in the column connecting to the bit line of the transmitting transistor is required to contain null code.

REFERENCES:
patent: 5045489 (1991-09-01), Gill et al.
patent: 5063170 (1991-11-01), Okuyama
patent: 5200355 (1993-04-01), Choi et al.

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