Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Electron beam imaging
Reexamination Certificate
2002-09-03
2004-12-14
Mohamedulla, Saleha R. (Department: 1756)
Radiation imagery chemistry: process, composition, or product th
Imaging affecting physical property of radiation sensitive...
Electron beam imaging
C430S005000, C430S030000, C430S022000, C430S318000
Reexamination Certificate
active
06830873
ABSTRACT:
BACKGROUND OF THE INVENTION
FIELD OF THE INVENTION
The invention relates to a method of adjusting and exposing the second level of a multi-level phase-shift mask, in which structures at the second level are exposed following adjustment (alignment) to alignment marks of a layer of a substrate or semiconductor wafer located beneath.
A fundamental aspect in the exposure of the second level of a phase-shift mask is the correct alignment to the alignment marks. Scanning the mask/the reticle to find these alignment structures, using an electron beam, has hitherto not been possible because of the electrical charging of the substrate irradiated with charged particles.
Hitherto, the second level of a phase-shift mask has been exposed with a laser-beam writer. Finding the alignment structures or marks was, in such a case, likewise carried out optically using laser light. Such a method did not result in any charging.
However, it is desirable to use an electron-beam writer to expose the second level of a phase-shift mask because such an electron-beam writer has considerably higher overlay accuracy and considerably better structural resolution than the laser-beam writer.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a method for adjusting and exposing the second level of a multi-level phase-shift mask that overcomes the hereinafore-mentioned disadvantages of the heretofore-known devices and methods of this general type and that adjusts and exposes the second level of a multi-level phase-shift mask by using an electron-beam writer.
With the foregoing and other objects in view, there is provided, in accordance with the invention, a method of adjusting and exposing a second level of a multi-level phase-shift mask, including the steps of exposing chip structures at the second level of a phase-shift mask following adjustment to alignment marks of a layer disposed beneath the second level, the layer selected from the group consisting of a substrate and a semiconductor wafer, by applying a photoresist layer for a second exposure over an entire area of the layer to be exposed by the second exposure, covering the chip structures in areas exposed in a preceding process with a covering layer, depositing a conductive layer over areas of the layer not covered by the covering layer and areas of the alignment marks, grounding the conductive layer and removing the covering layer, adjusting the alignment marks covered by the grounded conductive layer by scanning the marks with an electron-beam writer, the grounded conductive layer preventing the layer from being charged up by the electron-beam writer, and exposing the second level of the phase-shift mask with the electron-beam writer.
In accordance with another mode of the invention, the conductive layer is thinner than the photoresist layer, the layer, the chip structures, and/or the covering layer.
In accordance with a further mode of the invention, the deposition step is carried out by depositing a conductive layer over sections of areas immediately surrounding the alignment marks.
With the objects of the invention in view, there is also provided a method of adjusting and exposing a second level of a multi-level phase-shift mask on a layer selected from the group consisting of a substrate and a semiconductor wafer, chip structures at the second level above the layer being exposed following adjustment to alignment marks of the layer, including the steps of (A) applying a photoresist layer for a second exposure over an entire area of the layer to be exposed by the second exposure, (B) covering, with a covering layer, the chip structures in at least one area exposed in a preceding process, (C) depositing a conductive layer over sections of at least one area not covered by the covering layer, the alignment marks, and surroundings of the alignment marks, (D) grounding the conductive layer deposited in step and removing the covering layer, (E) adjusting by scanning the alignment marks covered by the grounded conductive layer by using an electron-beam writer, the grounded conductive layer preventing the layer from being charged up, and (F) exposing the second level of the phase-shift mask with the electron-beam writer.
In a method for providing a layer selected from the group consisting of a substrate and a semiconductor wafer, which includes exposing chip structures at a level above the layer following adjustment to alignment marks of the layer, with the objects of the invention in view, there is also provided a method of adjusting and exposing a second level of a multi-level phase-shift mask on the layer, including the steps of applying a photoresist layer for a second exposure over an entire area of the layer to be exposed by the second exposure, covering the chip structures in areas exposed in a preceding process with a covering layer, depositing a conductive layer over areas of the layer not covered by the covering layer and areas of the alignment marks, grounding the conductive layer and removing the covering layer, adjusting the alignment marks covered by the grounded conductive layer by scanning the marks with an electron-beam writer, the grounded conductive layer preventing the layer from being charged up by the electron-beam writer, and exposing the second level of the phase-shift mask with the electron-beam writer.
According to a significant aspect of the invention, the method is characterized by the following steps:
(A) applying a photoresist layer for the second exposure over the entire area of a wafer or substrate to be exposed by the second exposure;
(B) covering, with a covering layer, chip structures in the area that have been exposed in a preceding process;
(C) depositing a thin conductive layer over the sections of the area that are not covered by the covering layer and include the alignment marks and their surroundings;
(D) grounding the thin conductive layer deposited in step (C) and removing the covering layer;
(E) adjusting by scanning the alignment marks covered by the grounded thin conductive layer by using an electron-beam writer, the conductive grounded layer preventing the semiconductor substrate being charged up; and
(F) exposing the second level of the phase-shift mask with the electron-beam writer.
By the specific local deposition of a thin conductive layer on the alignment structures and their surroundings and grounding these surroundings, it is made possible to carry out the adjustment and exposure of the second level of the phase-shift mask with an electron-beam writer without charging up the substrate.
The advantages of the method according to the invention include the higher overlay accuracy of the electron-beam writer and the considerably better structural resolution as compared with the laser-beam writer. Further, the same process flow can be assumed for the second exposure step as for the first step. This results in a substantial saving in operating media (such as chemicals), a reduction in the logistic outlay and a restriction in the erroneous influence of humans.
Other features that are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a method for adjusting and exposing the second level of a phase-shift mask, it is, nevertheless, not intended to be limited to the details shown because various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof, will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
REFERENCES:
patent: 4871919 (1989-10-01), Donohue et al.
patent: 5814423 (1998-09-01), Maruyama et al.
patent: 6180291 (2001-01-01), Bessy et al.
patent: 2000 348 997 (2000-12-01), None
Goedl Gernot
Löffelmacher Dirk
Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
Mohamedulla Saleha R.
Stemer Werner H.
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