Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-03-28
2006-03-28
Le, Dung A. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S205000, C438S206000, C438S207000, C438S314000
Reexamination Certificate
active
07018884
ABSTRACT:
The present invention provides a method for parallel production of an MOS transistor in an MOS area of a substrate and a bipolar transistor in a bipolar area of the substrate. The method comprises generating an MOS preparation structure in the MOS area, wherein the MOS preparation structure comprises an area provided for a channel, a gate dielectric, a gate electrode layer and a mask layer on the gate electrode layer. Further, a bipolar preparation structure is generated in the bipolar area, which comprises a conductive layer and a mask layer on the conductive layer. The mask layer is thinned in the area of the gate electrode. For determining a gate electrode and a base terminal area, common structuring of the gate electrode layer and the conductive layer is performed.
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“Technologie hochintegrierter Schaltungen”, Widmann, Mader, Friedrich (“0,7 μm-BICMOS-Prozeβ”), pps 319-335, (17 pages).
English Translation of Abstract for Japanese Publication No. 05 006961 A.
Berthold Adrian
Böck Josef
Holz Jürgen
Klein Wolfgang
Le Dung A.
Maginot Moore & Beck
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