Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-03-28
1999-01-12
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438232, 438299, 438303, 438695, 438696, 438780, H01L 2147
Patent
active
058588477
ABSTRACT:
The present invention provides a method of manufacturing a lightly doped drain (LDD) structure using a polymer layer to define the LDD. The polymer layer is formed in an etch step which defines the gate electrode. The method begins by forming spaced field oxide regions 12 in a substrate 10. Next, a gate oxide layer 14, and a material layer 18 and a hard mask layer 22 are sequentially formed over the active area and the field oxide regions 12. A photo resist block 24 is formed over the hard mask layer 22 over the active area. The hard mask layer 22 is etched using the photo resist block 24 as a mask forming a hard mask block 22. The etch simultaneously forms a polymer layer 26 over the a top and sidewalls of the photo resist block 24 and over the sidewalls of the hard mask block. Impurities ions are implanted into the substrate in the active area using the polymer layer 26 as a mask forming highly doped drain regions 30 in the substrate 10. Next, the photo resist block 24 and the polymer layer 26 are removed. The hard mask is used as an etch barrier to etch the gate material to form a gate electrode 19 between the lightly doped drains. Subsequently, impurities ions are implanted into the substrate in the active area using the hard mask block 23 as a mask forming lightly doped drain regions 34 in the substrate 10.
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Pradeep Yelehanka Ramachandramurthy
Xu Dajiang
Zhou Mei Sheng
Ackerman Stephen B.
Chartered Semiconductor Manufacturing Ltd.
Murphy John
Niebling John F.
Saile George O.
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