Method, apparatus and computer program product for...

Details Method, apparatus and computer program product for... Method, apparatus and computer program product for...

Filed on

2005-11-03

Date issued

2008-03-25

Examiner

Louis-Jacques, Jacques (Department: 2117)

Patent Class

Error detection/correction and fault detection/recovery

SubClass

Pulse or data error handling

SubSubClass

Digital logic testing

Other Related Categories

C714S729000, C714S731000

Type

Reexamination Certificate

Status

active

Patent number

07350122

Description

ABSTRACT:
A method, apparatus and computer program product are provided for implementing scan-chain-specific control signals as an integral part of a scan chain. A scan input vector including scan data input and a scan control signal is applied to a register latch that forms the scan chain. The register latch includes a logic gate for combining a global clock control (THOLD) signal and the scan control signal. The scan control signal is routed around the register latch and including in a scan output vector including scan data output. Chain-specific control signals are eliminated from a clock control signal distribution tree used with the scan chain of the invention.

REFERENCES:
patent: 6779143 (2004-08-01), Grisenthwaite
patent: 2004/0148554 (2004-07-01), Dervisoglu et al.

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