Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2005-06-09
2008-07-01
Britt, Cynthia (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Reexamination Certificate
active
07395470
ABSTRACT:
A method, apparatus and computer program product are provided implementing a scan chain diagnostics technique. The diagnostics technique includes employing fuses coupled to latches of the scan chain to load a known logic value into the latches at known locations of the scan chain, and then unloading values from the scan chain, and if the scan chain is defective (for example, based on the unloaded logic values), then localizing a defect in the scan chain from the unloaded logic values by comparison thereof with the known locations of the latches of the scan chain loaded with the known logic value via the fuses. The scan chain may be predesigned with fuses spaced periodically across the chain every n latches to facilitate subsequent localization of a detected defect in the scan chain.
REFERENCES:
patent: 4503386 (1985-03-01), DasGupta et al.
patent: 4630270 (1986-12-01), Petit et al.
patent: 5313424 (1994-05-01), Adams et al.
patent: 5640402 (1997-06-01), Motika et al.
patent: 5657332 (1997-08-01), Auclair et al.
patent: 5677917 (1997-10-01), Wheelus et al.
patent: 5859804 (1999-01-01), Hedberg et al.
patent: 5951703 (1999-09-01), Sprouse et al.
patent: 6249465 (2001-06-01), Weiss et al.
patent: 6278956 (2001-08-01), Leroux et al.
patent: 6308290 (2001-10-01), Forlenza et al.
patent: 6385750 (2002-05-01), Kapur et al.
patent: 6442720 (2002-08-01), Koprowski et al.
patent: 6519202 (2003-02-01), Shubat et al.
patent: 6618826 (2003-09-01), Chen et al.
patent: 6646933 (2003-11-01), Shubat et al.
patent: 6662327 (2003-12-01), Rajski
patent: 6694454 (2004-02-01), Stanley
patent: 6807646 (2004-10-01), Williams et al.
patent: 6950974 (2005-09-01), Wohl et al.
patent: 6993694 (2006-01-01), Kapur et al.
patent: 7058869 (2006-06-01), Abdel-Hafez et al.
patent: 7071704 (2006-07-01), Crowell
patent: 7194706 (2007-03-01), Adkisson et al.
patent: 2002/0125907 (2002-09-01), Kurtulik et al.
patent: 2003/0131294 (2003-07-01), Motika et al.
patent: 2003/0229834 (2003-12-01), Cooke
patent: 2004/0003329 (2004-01-01), Cote et al.
patent: 2004/0246337 (2004-12-01), Hasegawa et al.
patent: 2005/0022142 (2005-01-01), Cheng et al.
patent: 2005/0047224 (2005-03-01), Farnsworth et al.
patent: 2006/0026472 (2006-02-01), Adkisson et al.
patent: 2006/0123375 (2006-06-01), Cheng et al.
patent: 2006/0200719 (2006-09-01), Keller
patent: 06230075 (1994-08-01), None
Ismet Bayraktaroglu et al., “Gate Level Fault Diagnosis in Scan-Based BIST,” Proceedings of the 2002 Design Automation and Test in Europe Conference, 1530-1591/02 IEEE.
Giuseppe A. Sarrica et al., “Theory and Implementation of LSSD Scan Ring & STUMPS Channel Test and Diagnosis,” Sep. 28-30, 1992, Electronics Manufacturing Technology Symposium, 1992; Thirteenth IEEE/CHMT International, pp. 195-201.
Burdine Todd M.
Forlenza Donato O.
Forlenza Orazio P.
Hurley William J.
Tran Phong T.
Britt Cynthia
Heslin Rothenberg Farley & & Mesiti P.C.
Merant Guerrier
LandOfFree
Method, apparatus, and computer program product for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method, apparatus, and computer program product for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method, apparatus, and computer program product for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3966399