Method, apparatus and computer program product for...

Electrical computers and digital processing systems: processing – Processing control – Specialized instruction processing in support of testing,...

Reexamination Certificate

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C714S038110, C714S039000, C717S131000

Reexamination Certificate

active

11405050

ABSTRACT:
Event vectors are included in an instruction tracking structure of a processor to collect history for every instruction flowing through the processor. Such an event vector, by its nature, cannot be whole until the vector's corresponding instruction completes. However, some information for the event vector is collected earlier, i.e., as the instruction flows through the processor prior to completion. Upon completion of the instruction, the instruction's event vector is examined. In each case a determination is made from the instruction history contained in the event vector as to whether a particular instruction has or has not caused or encountered an event of interest. Responsive to the determination, and possibly other information, a selection is made between saving event vector information and discarding the information.

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patent: 6574727 (2003-06-01), Davidson et al.
patent: 6675372 (2004-01-01), Damron
patent: 2003/0188226 (2003-10-01), Talcott et al.
“Microcode-Driven Analysis of Processor Resources”, IBM Technical Disclosure Bulletin, Feb. 1989, vol. 31, Iss. 9, pp. 394-395.
“Productivity Tool for Online Tracing of an Assembly Listing Using a PER TRACE File”, IBM Technical Disclosure Bulletin, Nov. 1987, vol. 30, Iss. 6, pp. 298-300.
U.S. Appl. No. 09/435,069, filed Nov. 4, 1999.
U.S. Appl. No. 09/703,346, filed Oct. 31, 2000.

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