Method and test apparatus for testing integrated circuits...

Details Method and test apparatus for testing integrated circuits... Method and test apparatus for testing integrated circuits...

2007-12-04

2007-12-04

Kerveros, James C. (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

10992389

ABSTRACT:
A simplified boundary scan test method capable of performing boundary test scanning of semiconductor chips. The test method includes providing valid test data to a first terminal of the semiconductor device and purposely providing invalid test data to a second terminal of the semiconductor device in a predetermined pattern algorithm. Preload data is also preloaded onto the semiconductor device. The valid and invalid test data is then captured in the semiconductor device. If the captured data is as expected, it signifies that there is no problem with the boundary scan circuitry on the device. On the other hand if the captured data differs from what is expected, it signifies that there may be a problem with the boundary scan circuitry.

REFERENCES:
patent: 5996102 (1999-11-01), Haulin
patent: 2002/0170011 (2002-11-01), Lai et al.
Avantest, “T6673 SOC Test System,” Jun. 2001, Avantest America Inc., 2 Pages.
Avantest Japan, “T6673 SOC Test System,” downloaded from http://www.advantest.co.jp/products/ate/t6673/en-index.shtml, Nov. 18, 2004, 2 Pages.
Avantest Japan, “T6683 SOC Test System,” downloaded from http://www.advantest.co.jp/products/ate/t6683/en-index.shtml, Nov. 18, 2004, 2 Pages.
IEEE Standard Test Access Port and Boundary-Scan Architecture (IEEE Std. 1149.1-2001).
IEEE Standard for Boundary-Scan Testing of Advanced Digital Networks (IEEE Std. 1149.6-2003).

Affiliated with

Also associated with

Rating

Method and test apparatus for testing integrated circuits... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and test apparatus for testing integrated circuits..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and test apparatus for testing integrated circuits... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3862714