Method and system of automatic delay detection and receiver...

Details Method and system of automatic delay detection and receiver... Method and system of automatic delay detection and receiver...

2005-05-10

2005-05-10

Cao, Chun (Department: 2115)

Electrical computers and digital processing systems: support

Synchronization of clock or timing signals, data, or pulses

Using delay

C713S400000, C713S500000, C713S600000

Reexamination Certificate

active

06892314

ABSTRACT:
An automatic delay detection and receiver adjustment method for a synchronous communications bus system sends a test pattern to the receivers of the system during a detection phase, uses the test pattern to determine a longest delay time for each bus lone, and adjusts a receiver for each bit line to receive incoming signals at a time based on the determined longest delay time.

REFERENCES:
patent: 3784907 (1974-01-01), Eichelberger
patent: 5280629 (1994-01-01), Lo Galbo et al.
patent: 5465346 (1995-11-01), Parks et al.
patent: 5509038 (1996-04-01), Wicki
patent: 6105144 (2000-08-01), Wu
patent: 6202168 (2001-03-01), Saito et al.
patent: 6335647 (2002-01-01), Nagano
patent: 0 585 086 (1994-03-01), None

Affiliated with

Also associated with

Rating

Method and system of automatic delay detection and receiver... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and system of automatic delay detection and receiver..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system of automatic delay detection and receiver... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3410838