Semiconductor device manufacturing: process – Including control responsive to sensed condition – Optical characteristic sensed
Patent
1998-04-27
2000-01-25
Chaudhari, Chandra
Semiconductor device manufacturing: process
Including control responsive to sensed condition
Optical characteristic sensed
438 12, H01L 2166
Patent
active
060177713
ABSTRACT:
A method and system provide for yield loss analysis for use in determining the killer stage in the manufacture of a semiconductor wafer at a plurality of manufacturing stages. The method comprising the following steps. Inspect semiconductor devices on the wafer visually to identify the location of visual defects on dies being manufactured on the wafer and to maintain a count of visual defects on the dies by location. Inspect the semiconductor dies on the wafer to determine the location and number defective dies on the wafer at each of the manufacturing stages. Calculate the defective die count for each stage for the wafer. Calculate the defective bad die count for each stage for the wafer. Determine the percentage of the defective bad die count divided by the defective die count. Plot the trend of the percentage of yield loss and the percentage of defective bad dies for each of the manufacturing stages. Compare the plots to determine the killer stage from analysis of the relative trends of matching between the plots of yield lost and the percentage of bad dies for the stage.
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Chang Chao-Hsin
Chang Wen-Chen
Yang Jiunn-Der
Yeh Renn-Shyan
Ackerman Stephen B.
Chaudhari Chandra
Jones II Graham S.
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
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