Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2011-02-15
2011-02-15
Lin, Sun J (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07890901
ABSTRACT:
The automatic verification of designs of digital circuits for their equivalence, wherein logic designs implemented in different hardware description languages (HDLs) and different design methodologies are compared. The designs (Code A, Code B) are modified by adding special wrappers (Wrapper A, Wrapper B), and used to equalize the timing of pairs of selected input signals and selected output signals of the logic designs. The wrappers drive certain signals of the designs that are not relevant for actual comparison, such signals including clock signals, clock control signals, scan-path signals, scan-path control signals, and reset signals. In a preferred embodiment, HDL descriptions of logic designs are analyzed. Based on this analysis, the wrappers are implemented as changes to the HDL descriptions. In another embodiment, RTL and/or gate-level netlists are analyzed and modified.
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Gemmeke Tobias
Leenstra Jens
Maeding Nicolas
Mony Hari
International Business Machines - Corporation
Lin Sun J
Memula Suresh
Schnurmann H. Daniel
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