Method and system for triggering a debugging unit

Details Method and system for triggering a debugging unit Method and system for triggering a debugging unit

2005-02-15

2005-02-15

Beausoliel, Robert (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C712S227000

Reexamination Certificate

active

06857083

ABSTRACT:
A processor core for transitioning a debugging unit between a plurality of operating states generates trace data as it processes operating signals of an instruction stream. The processor core provides a trigger event signal to the debugging unit in response to a trigger instruction signal within the instruction stream that is representative of triggering instruction for transitions debugging unit to one of (1) a base operating state, (2) a dynamic storage operating state or (3) a static storage operating state. Concurrently or alternatively, the processor core can provide the trigger event signal to the debugging unit as a function of generated trigger data in response to additional operational instructions within the instruction stream.

REFERENCES:
patent: 5621886 (1997-04-01), Alpert et al.
patent: 5978937 (1999-11-01), Miyamori et al.
patent: 6289473 (2001-09-01), Takase
patent: 6615370 (2003-09-01), Edwards et al.
patent: 6668339 (2003-12-01), Maeda
patent: 20020152427 (2002-10-01), Ok
patent: 20020194543 (2002-12-01), Veenstra et al.

Affiliated with

Also associated with

Rating

Method and system for triggering a debugging unit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and system for triggering a debugging unit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for triggering a debugging unit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3487810