Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2000-06-15
2003-09-30
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Reexamination Certificate
active
06629279
ABSTRACT:
FIELD OF INVENTION
This invention relates to Digital Signal Processors (DSP), and more particularly to testing of the performance of real time DSP algorithms.
BACKGROUND OF INVENTION
DSPs are used in many applications including use in modems, cellular phones, motor controls, and toys.
Subtle interactions between customer (known as peripheral) code and DSP algorithms can cause the digital output signal to deviate from the desired signals leading to performance degradation, customer returns, etc.
Multiple tests are needed to check if the digital signal has been corrupted. These tests require significant effort to establish and are time consuming. Some of these tests have to be done “offline” by taking the DSP out of it's application.
SUMMARY OF INVENTION
In accordance with one embodiment of the present invention, a digital signature equation is embedded in a processor code and when the processor is operated real time, the resultant signature output is used to verify if the processor has been corrupted.
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Narayan Suman
Rao Tandhoni S.
De'cady Albert
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
Torres Joseph D.
Troike Robert L.
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