Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate
2006-11-21
2006-11-21
Le, Vu A. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Testing
C365S049130
Reexamination Certificate
active
07139204
ABSTRACT:
A method and system for testing a multi-port memory cell are described. According to one embodiment of the invention, a multi-port memory device comprises an array of multi-port memory cells. Accordingly, each multi-port memory cell is connected to one word-line and two bit-lines per read/write port. The memory device includes memory testing logic to perform a first memory access operation (e.g., read/write) at a first port of the multi-port memory cell while the memory cell is in a stressed condition. For example, the first memory access operation occurs while a second memory access operation is emulated on a second port. Moreover, the memory access operations occur at a frequency that is substantially equivalent to a maximum operating frequency of the dual-port memory device.
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Le Vu A.
Virage Logic Corporation
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